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Table of Contents
asm Keywords
asm Keyword 1:Logic Operations
Logic operations are one of the fundamental aspects of computer science. In simplest terms logic operations takes one ore more value inputs and outputs a single value. As it relates to this course it is a boolean function where as the input is 0 or 1 and the output is 0 or 1, as defined by the type of operation. Basically Logic Operations are a physical implementation of truth tables.
- Here are the truth tables for AND, OR, and XOR:
AND
| INPUT | OUTPUT | |
|---|---|---|
| A | B | A AND B |
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
OR
| INPUT | OUTPUT | |
|---|---|---|
| A | B | A OR B |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
XOR
| INPUT | OUTPUT | |
|---|---|---|
| A | B | A AND B |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
- Each outputs have some difference but the key factor is that there is only ONE output and that everything is a boolean value.
asm Keyword 2: Negated Logic Operations
Negated Logic Operations work the same way as Logic operations(as defined in keyword 1) except the output is negated. So all boolean outputs are simply switched, if the output is for an AND operation is 0 then NAND would be 1.
asm Keyword 3: Address bus
The Address bus is a series of lines that connect devices. It is used specifically to specify a physical address. When a device needs to read or write to a memory location it specifies that location on the address bus.
asm Keyword 4: Data bus
After the Address bus trasnfers the information about the physical address of where the data should come or go, the data bus actually transfers the data.
asm Keyword 5: Fetch-execute cycle
The Fetch-Execute Cycle is the process of retrieving instructions from memory and implementing any action required by those instructions
- Also known as the instruction cycle
- Most basic operation of a computer
- is continuously repeating from bootup to shutdown
Steps of cycle:
- 1. Fetch the instruction
- From memory address stored in Program counter
- When finished the program counter will increment to the next address
- 2. Decode instructions
- Stored in instruction register
- 3. Read effective address
- Decide operation type, memory, I/O, or register
- 4. Execute instruction
- The control unit sends signals to releveant parts of CPU needed to implement instructions
asm Keyword 6: von Neumann vs. Harvard architecture
The Von Neumann architecture is the general purpose architecture for most modern pc's. It only has one bus used for data and instruction fetches. It typically only has one cache, if any at all, that stores both data and instructions.
The Harvard architecture utilises separate buses for data and instructions. This allows for data and instructions to be fetched simultaneously. Caches are almost always used with this architecture as it adds to its efficiency. Also separate caches can be used for data and instructions. This is not as readily used in the general purpose pc world as it is quite inefficient in processor design, at least compared to von Neumann.
asm Keyword 7: Binary and Hexadecimal Number Representation
Binary and Hexadecimal are the names of two common number representations used today. There are many others, decimal, or base 10, for example is one anyone reading this should know. 0 through 9. Binary, or base 2, is 0 and 1. Only two values hence its name. Hexadecimal, or base 16, uses 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F. These are different ways to represent quantities. Binary is the most commonly used when working with digital electronics. Processors only deal with two states, aka voltage levels, which we treat as 0's and 1's. Hexadecimal is commonly used for memory addresses for convenience, trying to display it in binary would be less convenient but can be done this way or with any number system. Any value can be represent by any number system, its a matter of convenience, preference, and of course standards that determine what we use.
asm Keyword 8: Processor & Memory Organization
- For this topic I have decided to talk about interleaving memory.
- “There are several memory banks which are one word wide, and one word wide bus. There is some logic in the memory that selects the correct bank to use when the memory gets accessed by the cache. Memory interleaving is a way to distribute individual addresses over memory modules. Its aim is to keep the most of modules busy as computations proceed. With memory interleaving, the low-order k bits of the memory address select a module, and the high-order m bits name a location within that module. Hence, consecutive addresses are located in successive modules. A request to access consecutive memory locations can keep several modules busy at the same time.”
asm Objective
asm Objective Understanding the C standard library
- The C Standard Library provides predefined functions macros and type definitions. This allows for handling strings and number computations. It also handles i/o and memory allocation. Without the standard library it would take us much longer as we would need to write code for these things each time wrote a program.
