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notes:sysnet

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notes:sysnet [2015/02/11 16:17] – [ALU] bfairch2notes:sysnet [2015/03/04 15:54] (current) – [sim] mp010784
Line 33: Line 33:
   * modulus   * modulus
   * bit shifting   * bit shifting
-    * left +    * left bfairch2 x 
-    * right+    * right bfairch2 x
   * bit rotation   * bit rotation
-    * left +    * left bfairch2 o 
-    * right+    * right bfairch2 o
   * bitwise logic   * bitwise logic
-    * AND (return in hex) +    * AND (return in hex)bfairch2 x 
-    * OR  (return in hex) +    * OR  (return in hex)bfairch2 x 
-    * NOT (return in hex) +    * NOT (return in hex)bfairch2 x 
-    * exclusive-OR (XOR, or as we may see it called: EOR) (return in hex)+    * exclusive-OR (XOR, or as we may see it called: EOR) (return in hex) bfairch2 x
     * others?     * others?
   * flags register   * flags register
Line 216: Line 216:
 0xE8:INX $%IMPL%:1:2 0xE8:INX $%IMPL%:1:2
 0xC8:INY $%IMPL%:1:2 0xC8:INY $%IMPL%:1:2
-0x4C:JMP $%ABSOL%:3:3 +0x4C:JMP $%ABSOL%:3:3 (dshadeck) 
-0x6C:JMP ($%INDIR%):3:5+0x6C:JMP ($%INDIR%):3:5 (dshadeck)
 0x20:JSR $%ABSOL%:3:6 0x20:JSR $%ABSOL%:3:6
 0xA9:LDA #$%IMMED%:2:2 0xA9:LDA #$%IMMED%:2:2
Line 266: Line 266:
 0x7E:ROR $%ABSOL%:3:7 0x7E:ROR $%ABSOL%:3:7
 0x40:RTI $%IMPL%:1:6 0x40:RTI $%IMPL%:1:6
-0x60:RTS $%IMPL%:1:6+0x60:RTS $%IMPL%:1:6   mp010784
 0xE9:SBC wedge (in class) 0xE9:SBC wedge (in class)
-0xE5:SBC $%ZPAGE%:2:3+0xE5:SBC $%ZPAGE%:2:3784
 0xF5:SBC $%ZPAGE%,X:2:4 0xF5:SBC $%ZPAGE%,X:2:4
 0xED:SBC $%ABSOL%:3:4 0xED:SBC $%ABSOL%:3:4
notes/sysnet.1423689476.txt.gz · Last modified: 2015/02/11 16:17 by bfairch2