notes:sysnet
Differences
This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
notes:sysnet [2015/02/05 07:20] – [NES simulator] wedge | notes:sysnet [2015/03/04 15:54] (current) – [sim] mp010784 | ||
---|---|---|---|
Line 1: | Line 1: | ||
======HPC Systems and Networking====== | ======HPC Systems and Networking====== | ||
- | Notes, scratchspace, | + | Notes, scratchspace, |
- | =====NES simulator===== | + | =====Linkage===== |
- | + | ||
- | ====Linkage==== | + | |
* http:// | * http:// | ||
Line 11: | Line 9: | ||
* http:// | * http:// | ||
- | ====TODO==== | + | =====TODO===== |
- | ===ALU=== | + | ====ALU==== |
As mentioned, there are commonly 4 methods of addressing, which we will find CPUs break out separate instruction variations for: | As mentioned, there are commonly 4 methods of addressing, which we will find CPUs break out separate instruction variations for: | ||
Line 35: | Line 33: | ||
* modulus | * modulus | ||
* bit shifting | * bit shifting | ||
- | * left | + | * left bfairch2 x |
- | * right | + | * right bfairch2 x |
* bit rotation | * bit rotation | ||
- | * left | + | * left bfairch2 o |
- | * right | + | * right bfairch2 o |
* bitwise logic | * bitwise logic | ||
- | * AND | + | * AND (return in hex)bfairch2 x |
- | * OR | + | * OR |
- | * NOT | + | * NOT (return in hex)bfairch2 x |
- | * exclusive-OR (XOR, or as we may see it called: EOR) | + | * exclusive-OR (XOR, or as we may see it called: EOR) (return in hex) bfairch2 x |
* others? | * others? | ||
* flags register | * flags register | ||
Line 70: | Line 68: | ||
* Compare (basically, instigate checks that could adjust flags register bits) | * Compare (basically, instigate checks that could adjust flags register bits) | ||
- | ===datamanip=== | + | ====datamanip==== |
The **datamanip/ | The **datamanip/ | ||
Line 82: | Line 80: | ||
* dec2reg.sh - vcordes1 | * dec2reg.sh - vcordes1 | ||
* oct2reg.sh - vcordes1 | * oct2reg.sh - vcordes1 | ||
- | * mem2reg | + | O means it is a work in progress |
- | * hex2mem | + | x means it is finished |
- | * dec2mem | + | |
- | * oct2mem | + | due to new realizations in how the program will work, we no longer need any of the mem2 or 2mem scripts. |
- | * reg2mem | + | |
- | * oct2hex | + | * oct2hex |
- | * dec2hex | + | * dec2hex |
- | * reg2hex | + | * reg2hex |
- | * mem2hex | + | * hex2oct |
- | * hex2oct | + | * dec2oct |
- | * dec2oct | + | * reg2oct |
- | * reg2oct | + | * hex2dec |
- | * mem2oct | + | * oct2dec |
- | * hex2dec | + | * reg2dec |
- | * oct2dec | + | |
- | * reg2dec | + | * core I/O functionality |
- | * mem2dec | + | * stdin.c |
- | * core I/O functionality | + | * stdout.c |
- | * stdin.c - wedge | + | * stderr.c |
- | * stdout.c - wedge | + | |
- | * stderr.c - wedge | + | ====memory==== |
+ | ALL memory scripts will return values in octal | ||
- | ===memory=== | ||
Functionality related to memory (RAM/ROM), which the CPU treats as external and non-primary storage. | Functionality related to memory (RAM/ROM), which the CPU treats as external and non-primary storage. | ||
Line 122: | Line 120: | ||
The point of memget/ | The point of memget/ | ||
- | ===register=== | + | ====register==== |
Utility scripts related to registers. | Utility scripts related to registers. | ||
Line 130: | Line 128: | ||
* a simulator bootstrap script, which reads config files and creates the necessary register files (under sim/reg/) | * a simulator bootstrap script, which reads config files and creates the necessary register files (under sim/reg/) | ||
- | ===sim=== | + | ====sim==== |
The **sim/** directory is for the runtime of the configured machine in question (our 6502 CPU + related hardware components, including any " | The **sim/** directory is for the runtime of the configured machine in question (our 6502 CPU + related hardware components, including any " | ||
Line 146: | Line 144: | ||
* ops/ - simulator CPU instruction scripts | * ops/ - simulator CPU instruction scripts | ||
* named for the hex value they represent, there is one script per individual instruction. The script' | * named for the hex value they represent, there is one script per individual instruction. The script' | ||
+ | |||
< | < | ||
- | 0x69:ADC # | + | 0x69:ADC # |
0x65:ADC $%ZPAGE%: | 0x65:ADC $%ZPAGE%: | ||
0x75:ADC $%ZPAGE%, | 0x75:ADC $%ZPAGE%, | ||
Line 217: | Line 216: | ||
0xE8:INX $%IMPL%:1:2 | 0xE8:INX $%IMPL%:1:2 | ||
0xC8:INY $%IMPL%:1:2 | 0xC8:INY $%IMPL%:1:2 | ||
- | 0x4C:JMP $%ABSOL%: | + | 0x4C:JMP $%ABSOL%: |
- | 0x6C:JMP ($%INDIR%): | + | 0x6C:JMP ($%INDIR%): |
0x20:JSR $%ABSOL%: | 0x20:JSR $%ABSOL%: | ||
0xA9:LDA # | 0xA9:LDA # | ||
Line 267: | Line 266: | ||
0x7E:ROR $%ABSOL%: | 0x7E:ROR $%ABSOL%: | ||
0x40:RTI $%IMPL%:1:6 | 0x40:RTI $%IMPL%:1:6 | ||
- | 0x60:RTS $%IMPL%:1:6 | + | 0x60:RTS $%IMPL%: |
0xE9:SBC wedge (in class) | 0xE9:SBC wedge (in class) | ||
- | 0xE5:SBC $%ZPAGE%:2:3 | + | 0xE5:SBC $%ZPAGE%:2:3784 |
0xF5:SBC $%ZPAGE%, | 0xF5:SBC $%ZPAGE%, | ||
0xED:SBC $%ABSOL%: | 0xED:SBC $%ABSOL%: | ||
Line 302: | Line 301: | ||
* sbin/ - simulator binaries... the scripts and compiled sources of the various utility functions | * sbin/ - simulator binaries... the scripts and compiled sources of the various utility functions | ||
- | ====Development approach==== | + | =====Development approach===== |
To acclimate everyone, we will be covering the basics, and attempting to provide everyone with ample opportunities to have a hand in helping to implement core simulator functionality. | To acclimate everyone, we will be covering the basics, and attempting to provide everyone with ample opportunities to have a hand in helping to implement core simulator functionality. | ||
notes/sysnet.1423138833.txt.gz · Last modified: 2015/02/05 07:20 by wedge