notes:sysnet
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notes:sysnet [2015/01/29 22:02] – mp010784 | notes:sysnet [2015/03/04 15:54] (current) – [sim] mp010784 | ||
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- | I'm not sure what all this old stuff is but I left it in case some one wants it, but here could be a good place to have a centralized list of what needs to be done for the NES Emulator (Spring 2015 HPC Sys & Net). (P.S. Why can I edit this and not my opus? | + | ======HPC Systems and Networking====== |
+ | Notes, scratchspace, | ||
- | **HPC SYS & NET** | + | =====Linkage===== |
- | =====Video Wall Links===== | + | * http:// |
- | For some DMX-related information, | + | * http:// |
+ | * http:// | ||
+ | * http:// | ||
- | * [[http:// | + | =====TODO===== |
- | * [[https:// | + | |
- | * [[http:// | + | |
- | * [[http:// | + | |
- | * [[http:// | + | |
+ | ====ALU==== | ||
+ | As mentioned, there are commonly 4 methods of addressing, which we will find CPUs break out separate instruction variations for: | ||
- | THE FUN Of FREENX | + | * register- register-to-register operation. Internal. |
+ | * immediate- constant(-to-register)... ability to provide a fixed value (like the number 3), as an operand | ||
+ | * memory- pull some (or all-- depends on CPU) information to be processed from memory (address provided as operand to instruction; | ||
+ | * indirect- pull data from the memory address specified in index/ | ||
- | how to install FREE NX ubuntu(9.10) | + | Due to the script-centric nature of the simulator, for our core ALU functionality, |
- | step one | + | Also, if context is unclear, always assume a register is the medium to be used. |
- | ( | + | |
- | add repository!!! | + | |
- | cmd (add-apt-repository ppa: | + | |
- | then update ubuntu | + | |
- | cmd( sudo apt-get update) | + | |
- | ) | + | |
- | step two | + | Functionality that needs to be implemented: |
- | ( | + | |
- | download and install freenx | + | |
- | cmd(sudo aptitude install freenx); | + | |
- | install freenx | + | |
- | cmd(sudo / | + | |
- | / | + | |
- | ) | + | |
- | step three | + | * adding |
- | ( | + | * register |
- | configure the NX server | + | * do we need any of the other forms with proper mangling? |
- | cmd(vi /etc/ | + | * subtracting |
- | you going to need to find port then put any port you want | + | * multiplication |
- | now you are going to have to restart ssh | + | * division |
- | cmd(/etc/init.d/ssh restart) | + | * modulus |
- | cmd(vi /etc/ | + | * bit shifting |
- | find where sshd_port=22 | + | * left bfairch2 x |
- | edit to what you put in sshd_config file | + | * right bfairch2 x |
- | cmd(vi /usr/NX/etc/server.cfg) | + | * bit rotation |
- | find sshdport =22 and change it to what you put in sshd_config file | + | * left bfairch2 o |
- | fimd sshdauthport = 22 and change it to what you put in sshd_config file | + | * right bfairch2 o |
- | ) | + | * bitwise logic |
+ | * AND (return in hex)bfairch2 x | ||
+ | * OR (return in hex)bfairch2 x | ||
+ | * NOT (return in hex)bfairch2 x | ||
+ | * exclusive-OR (XOR, or as we may see it called: EOR) (return in hex) bfairch2 x | ||
+ | * others? | ||
+ | * flags register | ||
+ | * check current state | ||
+ | * zero (ALU/checkZero.sh) - wedge | ||
+ | * sign | ||
+ | * carry | ||
+ | * overflow | ||
+ | * parity | ||
+ | * ... | ||
+ | * set flag state | ||
+ | * zero (ALU/setZero.sh) | ||
+ | * sign (ALU/setSign.sh) | ||
+ | * carry | ||
+ | * overflow | ||
+ | * parity | ||
+ | * ... | ||
+ | * clear flag state | ||
+ | * zero (ALU/clearZero.sh) | ||
+ | * sign | ||
+ | * carry | ||
+ | * overflow | ||
+ | * parity | ||
+ | * ... | ||
+ | * Compare (basically, instigate checks that could adjust flags register bits) | ||
- | step 4 | + | ====datamanip==== |
- | ( | + | The **datamanip/ |
- | configuring security | + | |
- | cmd(sudo dpkg-reconfigure freenx-server) | + | |
- | tab; enter; | + | |
- | this | + | |
- | next you will need a copy of the key in your home dir. | + | |
- | The client will need this in there home dir | + | |
- | ) | + | |
- | + | ||
- | + | ||
- | + | ||
- | ps.... | + | |
- | CTR+ALT+F Toggles full-screen mode. | + | |
- | CTRL+ALT+T Shows the terminate, suspend dialog. | + | |
- | CTRL+ALT+E lazy image encoding | + | |
- | CTRL+ALT+Shift+ESC Emergency-exit and kill-window | + | |
- | cory cheney | + | |
- | ... | + | |
- | .... | + | |
+ | * load (datamanip/ | ||
+ | * load will load a byte located at the specified memory address and output it in register format | ||
+ | * store | ||
+ | * store will take a byte (in register format) and store it at the specified memory address | ||
+ | * data juggling -- these are largely to assist us, especially when implementing other core functionality. | ||
+ | * hex2reg.sh - wedge | ||
+ | * reads hex value from STDIN, outputs it in our " | ||
+ | * dec2reg.sh - vcordes1 | ||
+ | * oct2reg.sh - vcordes1 | ||
+ | O means it is a work in progress | ||
+ | x means it is finished | ||
- | HowToSelfEnlightenment With Render Farm With Blender & JoeFarm | + | due to new realizations in how the program will work, we no longer need any of the mem2 or 2mem scripts. |
- | on Linux | + | |
+ | * oct2hex | ||
+ | * dec2hex | ||
+ | * reg2hex | ||
+ | * hex2oct | ||
+ | * dec2oct | ||
+ | * reg2oct | ||
+ | * hex2dec | ||
+ | * oct2dec | ||
+ | * reg2dec | ||
- | step1 | + | * core I/O functionality |
- | ( | + | * stdin.c - wedge |
- | “RTFM” | + | * stdout.c - wedge |
- | This is not a howto but more of a guide to Self Enlightenment. | + | * stderr.c - wedge |
- | That said you are going to need to read up on JoeFarm. | + | |
- | (“Http:// | + | |
- | ) | + | |
- | step2 | + | ====memory==== |
- | ( | + | ALL memory scripts will return values in octal |
- | Things needed to farm with farmer joe. | + | |
- | Blender (google blender to find it and read up on it | + | |
- | install cmd(“aptitude install blender”) | + | |
- | SMB( google SMB to find it and read up on it | + | |
- | install cmd(“aptitude install SMB”) | + | |
- | only if you want to bucket render; I want am not goto do a lot with it so I am not doing it | + | |
- | Imagemagick: | + | |
- | ) | + | |
- | step3 | + | Functionality related |
- | ( | + | |
- | You are going to need a directory for farmerjoe. | + | |
- | You can us the CMD(”mkdir”). | + | |
- | If you read the “RTFM” you would know what to name it. | + | |
- | ) | + | |
- | | + | It is stored in a binary file (in an attempt |
- | ( | + | |
- | you will need to configure SMB this I will help a little on. | + | |
- | farmerjoe] | + | |
- | guest account = lobo | + | |
- | force user = lobo | + | |
- | | + | |
- | | + | |
- | path = / | + | |
- | force group = lobo | + | |
- | | + | |
- | browseable = yes | + | |
- | writable = yes | + | |
- | ) | + | |
- | step5 | + | * memget.sh - wedge |
- | ( | + | * may not be fully functional, likely needs some tweaks |
- | configure slave | + | * basically, we provide it with the path to the memory file and the address, and it should produce a byte of information (in register format?) |
- | you will need to read up on fstab(“htttp:// | + | * memgetbyte.c - wedge |
+ | * an attempt at (re-)implementing core memory interactions. This program specifically will grab and return (in hex) the byte of memory at indicated memory address | ||
+ | * logic currently assumes all bytes are 8-bits (not really a problem for our current endeavor) | ||
+ | * meminit.sh - wedge | ||
+ | * bootstrap script on simulator start that will read simulator config files and generate appropriate memory files (and initialize to initial values? All zeros right now) | ||
+ | * memput.sh - wedge | ||
+ | * the opposite of memget; memput will take a byte of data from a register and is responsible for placing it into memory at an indicated address | ||
- | //<master server>/ | + | The point of memget/memput is that all other simulator functions needing |
- | note to self need to edit this file to get to work on pc1 | + | |
- | ) | + | |
- | step6 | + | ====register==== |
- | ( | + | Utility scripts related to registers. |
- | configure the ip on | + | |
- | farmerjoe.conf file | + | |
- | and other stuff | + | |
- | ) | + | |
- | last you need to add farmerjoe_submit.py | + | * regdisp.sh - wedge |
- | /usr/share/ | + | * yes, little more than a **cat** of an indicated register file, but as is the spirit with the memget/ |
- | ) | + | * reginit.sh - wedge |
+ | * a simulator bootstrap script, which reads config files and creates the necessary register files (under sim/reg/) | ||
+ | ====sim==== | ||
+ | The **sim/** directory is for the runtime of the configured machine in question (our 6502 CPU + related hardware components, including any " | ||
- | ok the test failed for me I keep get a err with .py | + | It consists of several subdirectories: |
- | but the how it should work | + | |
- | ccheney | + | |
+ | * etc/ - simulator config files | ||
+ | * instructions.conf - mapping of hex opcodes to assembly mneumonics and instruction size/cycle info | ||
+ | * this is meant as a database to assist with simulator operations (and reference for us when implementing things) | ||
+ | * io.conf - mapping of memory addresses to I/O; a way of letting us hook device access into memory | ||
+ | * memory.conf - memory layout | ||
+ | * registers.conf - register layout | ||
+ | * simulator.conf - intended top-level config for simulator | ||
+ | * simvar.sh - bootstrap script setting important variables | ||
+ | * may also provide some simulator-environment library functions | ||
+ | * ops/ - simulator CPU instruction scripts | ||
+ | * named for the hex value they represent, there is one script per individual instruction. The script' | ||
+ | |||
+ | < | ||
+ | 0x69:ADC # | ||
+ | 0x65:ADC $%ZPAGE%: | ||
+ | 0x75:ADC $%ZPAGE%, | ||
+ | 0x6D:ADC $%ABSOL%: | ||
+ | 0x7D:ADC $%ABSOL%, | ||
+ | 0x79:ADC $%ABSOL%, | ||
+ | 0x61:ADC ($%INDIR%, | ||
+ | 0x71:ADC ($%INDIR%), | ||
+ | 0x29:AND # | ||
+ | 0x25:AND $%ZPAGE%: | ||
+ | 0x35:AND $%ZPAGE, | ||
+ | 0x2D:AND $%ABSOL%: | ||
+ | 0x3D:AND $%ABSOL%, | ||
+ | 0x39:AND $%ABSOL%, | ||
+ | 0x21:AND ($%OFFSET%, | ||
+ | 0x31:AND ($%OFFSET%), | ||
+ | 0x0A:ASL $%ACCUM%: | ||
+ | 0x06:ASL $%ZPAGE%: | ||
+ | 0x16:ASL $%ZPAGE%, | ||
+ | 0x0E:ASL $%ABSOL%: | ||
+ | 0x1E:ASL $%ABSOL%, | ||
+ | 0x90:BCC $%RELATIVE%: | ||
+ | 0xB0:BCS $%RELATIVE%2: | ||
+ | 0xF0:BEQ $%RELATIVE%2: | ||
+ | 0x24:BIT $%ZPAGE%: | ||
+ | 0x2C:BIT $%ABSOL%: | ||
+ | 0x30:BMI $%RELATIVE%: | ||
+ | 0xD0:BNE $%RELATIVE%: | ||
+ | 0x10:BPL $%RELATIVE%: | ||
+ | 0x00:BRK $%IMPL%:1:7 | ||
+ | 0x50:BVC $%RELATIVE%: | ||
+ | 0x70:BCS $%RELATIVE%: | ||
+ | 0x18:CLC $%IMPL%:1:2 | ||
+ | 0xD8:CLD $%IMPL%:1:2 | ||
+ | 0x58:CLI $%IMPL%:1:2 | ||
+ | 0xB8:CLV $%IMPL%:1:2 | ||
+ | 0xC9:CMP # | ||
+ | 0xC5:CMP $%ZPAGE%: | ||
+ | 0xD5:CMP $%ZPAGE%, | ||
+ | 0xCD:CMP $%ABSOL%: | ||
+ | 0xDD:CMP $%ABSOL%, | ||
+ | 0xD9:CMP $%ABSOL%, | ||
+ | 0xC1:CMP ($%INDIR%, | ||
+ | 0xD1:CMP ($%INDIR%), | ||
+ | 0xE0:CPX # | ||
+ | 0xE4:CPX $%ZPAGE%: | ||
+ | 0xEC:CPX $%ABSOL%: | ||
+ | 0xC0:CPY # | ||
+ | 0xC4:CPY $%ZPAGE%: | ||
+ | 0xCC:CPY $%ABSOL%: | ||
+ | 0xC6:DEC $%ZPAGE%: | ||
+ | 0xD6:DEC $%ZPAGE%, | ||
+ | 0xCE:DEC $%ABSOL%: | ||
+ | 0xDE:DEC $%ABSOL%, | ||
+ | 0xCA:DEX $%IMPL%:1:2 | ||
+ | 0x88:DEY $%IMPL%:1:2 | ||
+ | 0x49:EOR # | ||
+ | 0x45:EOR $%ZPAGE%: | ||
+ | 0x55:EOR $%ZPAGE%, | ||
+ | 0x4D:EOR $%ABSOL%: | ||
+ | 0x5D:EOR $%ABSOL%, | ||
+ | 0x59:EOR $%ABSOL%, | ||
+ | 0x41:EOR ($%INDIR%, | ||
+ | 0x51:EOR ($%INDIR%), | ||
+ | 0xE6:INC $%ZPAGE%: | ||
+ | 0xF6:INC $%ZPAGE%, | ||
+ | 0xEE:INC $%ABSOL%: | ||
+ | 0xFE:INC $%ABSOL%, | ||
+ | 0xE8:INX $%IMPL%:1:2 | ||
+ | 0xC8:INY $%IMPL%:1:2 | ||
+ | 0x4C:JMP $%ABSOL%: | ||
+ | 0x6C:JMP ($%INDIR%): | ||
+ | 0x20:JSR $%ABSOL%: | ||
+ | 0xA9:LDA # | ||
+ | 0xA5:LDA $%ZPAGE%: | ||
+ | 0xB5:LDA $%ZPAGE%, | ||
+ | 0xAD:LDA $%ABSOL%: | ||
+ | 0xBD:LDA $%ABSOL%, | ||
+ | 0xB9:LDA $%ABSOL%, | ||
+ | 0xA1:LDA ($%INDIR%, | ||
+ | 0xB1:LDA ($%INDIR%), | ||
+ | 0xA2:LDX # | ||
+ | 0xA6:LDX $%ZPAGE%: | ||
+ | 0xB6:LDX $%ZPAGE%, | ||
+ | 0xAE:LDX $%ABSOL%: | ||
+ | 0xBE:LDX $%ABSOL%, | ||
+ | 0xA0:LDY # | ||
+ | 0xA4:LDY $%ZPAGE%: | ||
+ | 0xB4:LDY $%ZPAGE%, | ||
+ | 0xAC:LDY $%ABSOL%: | ||
+ | 0xBC:LDY $%ABSOL%, | ||
+ | 0x4A:LSR $%ACCUM%: | ||
+ | 0x46:LSR $%ZPAGE%: | ||
+ | 0x56:LSR $%ZPAGE%, | ||
+ | 0x4E:LSR $%ABSOL%: | ||
+ | 0x5E:LSR $%ABSOL%, | ||
+ | 0xEA:NOP $%IMPL%:1:2 | ||
+ | 0x09:ORA # | ||
+ | 0x05:ORA $%ZPAGE%: | ||
+ | 0x15:ORA $%ZPAGE%, | ||
+ | 0x0D:ORA $%ABSOL%: | ||
+ | 0x1D:ORA $%ABSOL%, | ||
+ | 0x19:ORA $%ABSOL%, | ||
+ | 0x01:ORA ($%INDIR%, | ||
+ | 0x11:ORA ($%INDIR%), | ||
+ | 0x48:PHA $%IMPL%:1:3 | ||
+ | 0x08:PHP $%IMPL%:1:3 | ||
+ | 0x68:PLA $%IMPL%:1:4 | ||
+ | 0x28:PLP $%IMPL%:1:4 | ||
+ | 0x2A:ROL $%ACCUM%: | ||
+ | 0x26:ROL $%ZPAGE%: | ||
+ | 0x36:ROL $%ZPAGE%, | ||
+ | 0x2E:ROL $%ABSOL%: | ||
+ | 0x3E:ROL $%ABSOL%: | ||
+ | 0x6A:ROR $%ACCUM%: | ||
+ | 0x66:ROR $%ZPAGE%: | ||
+ | 0x76:ROR $%ZPAGE%, | ||
+ | 0x6E:ROR $%ABSOL%: | ||
+ | 0x7E:ROR $%ABSOL%: | ||
+ | 0x40:RTI $%IMPL%:1:6 | ||
+ | 0x60:RTS $%IMPL%: | ||
+ | 0xE9:SBC wedge (in class) | ||
+ | 0xE5:SBC $%ZPAGE%: | ||
+ | 0xF5:SBC $%ZPAGE%, | ||
+ | 0xED:SBC $%ABSOL%: | ||
+ | 0xFD:SBC $%ABSOL%, | ||
+ | 0xF9:SBC $%ABSOL%, | ||
+ | 0xE1:SBC ($%INDIR%, | ||
+ | 0xF1:SBC ($%INDIR%), | ||
+ | 0x38:SEC $%IMPL%:1:2 | ||
+ | 0xF8:SED $%IMPL%: | ||
+ | 0x78:SEI $%IMPL%:1:2 | ||
+ | Ox85:STA $%ZPAGE%: | ||
+ | 0x95:STA $%ZPAGE%, | ||
+ | 0x8D:STA $%ABSOL%: | ||
+ | 0x9D:STA $%ABSOL%, | ||
+ | 0x99:STA $%ABSOL%, | ||
+ | 0x81:STA ($%INDIR%, | ||
+ | 0x91:STA ($%INDIR%), | ||
+ | 0x86:STX $%ZPAGE%: | ||
+ | 0x96:STX $%ZPAGE%, | ||
+ | 0x8E:STX $%ABSOL%: | ||
+ | 0x84:STY $%ZPAGE%: | ||
+ | 0x94:STY $%ZPAGE%, | ||
+ | 0x8C:STY $%ABSOL%: | ||
+ | 0xAA:TAX wedge (in class) | ||
+ | 0xA8:TAY mp010784 | ||
+ | 0xBA:TSX dshadeck | ||
+ | 0x8A:TXA mp010784 | ||
+ | 0x9A:TXS dshadeck | ||
+ | 0x98:TYA mp010784 | ||
+ | </ | ||
+ | * code/ - programs to run on the simulator | ||
+ | * sbin/ - simulator binaries... the scripts and compiled sources of the various utility functions | ||
+ | |||
+ | =====Development approach===== | ||
+ | To acclimate everyone, we will be covering the basics, and attempting to provide everyone with ample opportunities to have a hand in helping to implement core simulator functionality. | ||
+ | |||
+ | Sort of the tinderbox approach (exposure to ideas that may spark understanding) | ||
+ | |||
+ | Each week we may stop and focus on a particular aspect of the simulator (such as take an instruction, | ||
+ | |||
+ | The general trend is that this stuff is so stupidly simple and obvious it is hard to comprehend just how simple and obvious it is. We are used to things being far more complex. | ||
+ | |||
+ | That is one of the things I love about Computer Organization / this project... I get to see people experiencing those moments of clarity, and slowly realizing more and more what is going on (the stark simplicity, but vast redundancy of the whole thing). |
notes/sysnet.1422586932.txt.gz · Last modified: 2015/01/29 22:02 by mp010784