notes:sysnet
Differences
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| Both sides previous revisionPrevious revisionNext revision | Previous revisionLast revisionBoth sides next revision | ||
| notes:sysnet [2015/02/13 18:44] – [ALU] bfairch2 | notes:sysnet [2015/03/04 20:52] – [sim] dshadeck | ||
|---|---|---|---|
| Line 33: | Line 33: | ||
| * modulus | * modulus | ||
| * bit shifting | * bit shifting | ||
| + | * left bfairch2 x | ||
| + | * right bfairch2 x | ||
| + | * bit rotation | ||
| * left bfairch2 o | * left bfairch2 o | ||
| * right bfairch2 o | * right bfairch2 o | ||
| - | * bit rotation | ||
| - | * left | ||
| - | * right | ||
| * bitwise logic | * bitwise logic | ||
| * AND (return in hex)bfairch2 x | * AND (return in hex)bfairch2 x | ||
| Line 216: | Line 216: | ||
| 0xE8:INX $%IMPL%:1:2 | 0xE8:INX $%IMPL%:1:2 | ||
| 0xC8:INY $%IMPL%:1:2 | 0xC8:INY $%IMPL%:1:2 | ||
| - | 0x4C:JMP $%ABSOL%: | + | 0x4C:JMP $%ABSOL%: |
| - | 0x6C:JMP ($%INDIR%): | + | 0x6C:JMP ($%INDIR%): |
| 0x20:JSR $%ABSOL%: | 0x20:JSR $%ABSOL%: | ||
| 0xA9:LDA # | 0xA9:LDA # | ||
notes/sysnet.txt · Last modified: 2015/03/04 20:54 by mp010784
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