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notes:comporg:spring2025:virconref [2025/02/27 16:09] – [CFB] wedge | notes:comporg:spring2025:virconref [2025/03/02 03:43] (current) – [GPU] tkastne1 | ||
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^ Type ^ Port ^ Name ^ Description | ^ Type ^ Port ^ Name ^ Description | ||
| OUT | 0x200 | GPU_Command | | OUT | 0x200 | GPU_Command | ||
- | | | + | | |
+ | | IN | 0x202 | GPU_ClearColor | ||
| OUT | 0x202 | GPU_ClearColor | | OUT | 0x202 | GPU_ClearColor | ||
- | | | + | | |
- | | | + | | |
+ | | IN | 0x204 | GPU_ActiveBlending | ||
+ | | OUT | ||
| IN | 0x204 | GPU_SelectedTexture | | IN | 0x204 | GPU_SelectedTexture | ||
| OUT | 0x204 | GPU_SelectedTexture | | OUT | 0x204 | GPU_SelectedTexture | ||
| IN | 0x205 | GPU_SelectedRegion | | IN | 0x205 | GPU_SelectedRegion | ||
| OUT | 0x205 | GPU_SelectedRegion | | OUT | 0x205 | GPU_SelectedRegion | ||
+ | | IN | 0x206 | GPU_DrawingPointX | ||
| OUT | 0x206 | GPU_DrawingPointX | | OUT | 0x206 | GPU_DrawingPointX | ||
+ | | IN | 0x207 | GPU_DrawingPointY | ||
| OUT | 0x207 | GPU_DrawingPointY | | OUT | 0x207 | GPU_DrawingPointY | ||
- | | | + | | |
- | | | + | | OUT |
- | | | + | | |
+ | | OUT | ||
+ | | | ||
+ | | OUT | 0x20A | GPU_DrawingAngle | ||
+ | | IN | 0x20B | GPU_RegionMinX | ||
| OUT | 0x20B | GPU_RegionMinX | | OUT | 0x20B | GPU_RegionMinX | ||
+ | | IN | 0x20C | GPU_RegionMinY | ||
| OUT | 0x20C | GPU_RegionMinY | | OUT | 0x20C | GPU_RegionMinY | ||
+ | | IN | 0x20D | GPU_RegionMaxX | ||
| OUT | 0x20D | GPU_RegionMaxX | | OUT | 0x20D | GPU_RegionMaxX | ||
+ | | IN | 0x20E | GPU_RegionMaxY | ||
| OUT | 0x20E | GPU_RegionMaxY | | OUT | 0x20E | GPU_RegionMaxY | ||
+ | | IN | 0x20F | GPU_RegionHotspotX | ||
| OUT | 0x20F | GPU_RegionHotspotX | | OUT | 0x20F | GPU_RegionHotspotX | ||
+ | | IN | 0x210 | GPU_RegionHotspotY | ||
| OUT | 0x210 | GPU_RegionHotspotY | | OUT | 0x210 | GPU_RegionHotspotY | ||
| | ||
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JF performs a jump only if its first operand is false, i.e. zero when taken as an integer. In that case its behavior is the same as an unconditional jump. Otherwise it has no effect. | JF performs a jump only if its first operand is false, i.e. zero when taken as an integer. In that case its behavior is the same as an unconditional jump. Otherwise it has no effect. | ||
- | ====IEQ==== | + | ====Integer |
- | Integer | + | |
- | + | ||
- | Should the first operand contain the same information as the second operand, the result will be true. Otherwise, false. | + | |
- | + | ||
- | ===NOTE=== | + | |
For the purposes of comparisons and conditional jumps on Vircon32: | For the purposes of comparisons and conditional jumps on Vircon32: | ||
Line 380: | Line 389: | ||
* is greater than | * is greater than | ||
* is greater than or equal to | * is greater than or equal to | ||
+ | |||
+ | ====IEQ==== | ||
+ | Integer Compare Equality: comparisons allow us typically to evaluate two values, in accordance with some relational operation, resulting in a true (1) or false (0) result. | ||
+ | |||
+ | Should the first operand contain the same information as the second operand, the result will be true. Otherwise, false. | ||
===Structure and variants=== | ===Structure and variants=== | ||
Line 396: | Line 410: | ||
Here, we test to see if the first operand is not equal to the second operand. If they are equal, the result is false, otherwise, not being equal yields a result of true. | Here, we test to see if the first operand is not equal to the second operand. If they are equal, the result is false, otherwise, not being equal yields a result of true. | ||
- | |||
- | ===NOTE=== | ||
- | For the purposes of comparisons and conditional jumps on Vircon32: | ||
- | |||
- | * true is 1 (technically non-zero) | ||
- | * false is 0 | ||
- | |||
- | There are six relational operations: | ||
- | |||
- | * is equal to | ||
- | * is not equal to | ||
- | * is less than | ||
- | * is than or equal to | ||
- | * is greater than | ||
- | * is greater than or equal to | ||
===Structure and variants=== | ===Structure and variants=== | ||
Line 427: | Line 426: | ||
In this case, we are testing if the first operand is greater than the second operand. | In this case, we are testing if the first operand is greater than the second operand. | ||
- | |||
- | ===NOTE=== | ||
- | For the purposes of comparisons and conditional jumps on Vircon32: | ||
- | |||
- | * true is 1 (technically non-zero) | ||
- | * false is 0 | ||
- | |||
- | There are six relational operations: | ||
- | |||
- | * is equal to | ||
- | * is not equal to | ||
- | * is less than | ||
- | * is than or equal to | ||
- | * is greater than | ||
- | * is greater than or equal to | ||
===Structure and variants=== | ===Structure and variants=== | ||
Line 459: | Line 443: | ||
In this case, we are testing if the first operand is greater than or equal to the second operand. | In this case, we are testing if the first operand is greater than or equal to the second operand. | ||
- | |||
- | ===NOTE=== | ||
- | For the purposes of comparisons and conditional jumps on Vircon32: | ||
- | |||
- | * true is 1 (technically non-zero) | ||
- | * false is 0 | ||
- | |||
- | There are six relational operations: | ||
- | |||
- | * is equal to | ||
- | * is not equal to | ||
- | * is less than | ||
- | * is than or equal to | ||
- | * is greater than | ||
- | * is greater than or equal to | ||
===Structure and variants=== | ===Structure and variants=== | ||
Line 490: | Line 459: | ||
In this case, we are testing if the first operand is less than the second operand. | In this case, we are testing if the first operand is less than the second operand. | ||
- | |||
- | ===NOTE=== | ||
- | For the purposes of comparisons and conditional jumps on Vircon32: | ||
- | |||
- | * true is 1 (technically non-zero) | ||
- | * false is 0 | ||
- | |||
- | There are six relational operations: | ||
- | |||
- | * is equal to | ||
- | * is not equal to | ||
- | * is less than | ||
- | * is than or equal to | ||
- | * is greater than | ||
- | * is greater than or equal to | ||
===Structure and variants=== | ===Structure and variants=== | ||
Line 521: | Line 475: | ||
In this case, we are testing if the first operand is less than or equal to the second operand. | In this case, we are testing if the first operand is less than or equal to the second operand. | ||
- | |||
- | ===NOTE=== | ||
- | For the purposes of comparisons and conditional jumps on Vircon32: | ||
- | |||
- | * true is 1 (technically non-zero) | ||
- | * false is 0 | ||
- | |||
- | There are six relational operations: | ||
- | |||
- | * is equal to | ||
- | * is not equal to | ||
- | * is less than | ||
- | * is than or equal to | ||
- | * is greater than | ||
- | * is greater than or equal to | ||
===Structure and variants=== | ===Structure and variants=== | ||
^ Variant | ^ Variant | ||
- | | 1 |<nowiki>ILE DSTREG, ImmediateValue</ | + | | 1 |<code asm>ILE DSTREG, ImmediateValue</ |
- | | 2 |<nowiki>ILE DSTREG, SRCREG</nowiki> |<nowiki>if (DSTREG <= SRCREG) DSTREG=1; else DSTREG=0;</ | + | |
+ | else | ||
+ | | ||
+ | | 2 |<code asm>ILE DSTREG, SRCREG</code> |<code c>if (DSTREG <= SRCREG) | ||
+ | | ||
+ | else | ||
+ | | ||
===Description=== | ===Description=== | ||
Line 570: | Line 515: | ||
===Structure and variants=== | ===Structure and variants=== | ||
^ Variant | ^ Variant | ||
- | | 1 |<nowiki>MOV DSTREG, ImmediateValue</ | + | | 1 |<code asm>MOV DSTREG, ImmediateValue</ |
- | | 2 |<nowiki>MOV DSTREG, SRCREG</nowiki> |<nowiki>DSTREG = SRCREG;</ | + | | 2 |<code asm>MOV DSTREG, SRCREG</code> |<code c>DSTREG = SRCREG;</ |
- | | 3 |<nowiki>MOV DSTREG, [ImmediateValue]</ | + | | 3 |<code asm>MOV DSTREG, [ImmediateValue]</ |
- | | 4 |<nowiki>MOV DSTREG, [SRCREG]</ | + | | 4 |<code asm>MOV DSTREG, [SRCREG]</ |
- | | 5 |<nowiki>MOV DSTREG, [SRCREG+ImmediateValue]</ | + | | 5 |<code asm>MOV DSTREG, [SRCREG+ImmediateValue]</ |
- | | 6 |<nowiki>MOV [ImmediateValue], | + | | 6 |<code asm>MOV [ImmediateValue], |
- | | 7 |<nowiki>MOV [DSTREG], SRCREG</nowiki> |<nowiki> | + | | 7 |<code asm>MOV [DSTREG], SRCREG</code> |<code c> |
- | | 8 |<nowiki>MOV [DSTREG+ImmediateValue], | + | | 8 |<code asm>MOV [DSTREG+ImmediateValue], |
- | + | ||
- | ===Processing actions=== | + | |
- | + | ||
- | ==Register Destination== | + | |
- | * Immediate: < | + | |
- | * Register: < | + | |
- | * Indirect with Immediate reference: < | + | |
- | * Indirect with Register reference: < | + | |
- | * Indirect Indexed with Register: < | + | |
- | + | ||
- | ==Memory Destination== | + | |
- | * Indirect with Immediate reference: < | + | |
- | * Indirect with Register reference: < | + | |
- | * Indirect with Indexed reference: < | + | |
===Description=== | ===Description=== | ||
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^ Binary | ^ Binary | ||
- | | 000 | | + | | 000 | |
- | | 001 | | + | | 001 | |
- | | 010 | | + | | 010 | |
- | | 011 | | + | | 011 | |
- | | 100 | | + | | 100 | |
- | | 101 | < | + | | 101 | < |
- | | 110 | < | + | | 110 | < |
- | | 111 | < | + | | 111 | < |
====LEA==== | ====LEA==== | ||
Load Effective Address of a memory position. | Load Effective Address of a memory position. | ||
- | |||
- | ===Addressing=== | ||
- | LEA, like other data-centric instructions, | ||
- | |||
- | * **register**: | ||
- | * **immediate**: | ||
- | * **indirect**: | ||
- | * **indexed**: | ||
- | * **immediate**: | ||
- | * **indexed**: | ||
- | * **register**: | ||
- | |||
- | Indirect processing is accomplished with the **< | ||
===Structure and variants=== | ===Structure and variants=== | ||
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===Structure and variants=== | ===Structure and variants=== | ||
^ Variant | ^ Variant | ||
- | | 1 |<code asm>CIB DSTREG</ | + | | 1 |<code asm>CIB DSTREG</ |
+ | | ||
+ | else | ||
+ | DSTREG = 0;</ | ||
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===Structure and variants=== | ===Structure and variants=== | ||
^ Variant | ^ Variant | ||
- | | 1 |<code asm>CFB DSTREG</ | + | | 1 |<code asm>CFB DSTREG</ |
+ | | ||
+ | else | ||
+ | | ||
===Description=== | ===Description=== | ||
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===Structure and variants=== | ===Structure and variants=== | ||
^ Variant | ^ Variant | ||
- | | 1 |<nowiki>AND DSTREG, ImmediateValue</ | + | | 1 |<code asm>AND DSTREG, ImmediateValue</ |
- | | 2 |<nowiki>AND DSTREG, SRCREG</nowiki> |<nowiki>DSTREG = DSTREG & SRCREG;</ | + | | 2 |<code asm>AND DSTREG, SRCREG</code> |<code c>DSTREG = DSTREG & SRCREG;</ |
===Description=== | ===Description=== | ||
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===Structure and variants=== | ===Structure and variants=== | ||
^ Variant | ^ Variant | ||
- | | 1 |<nowiki>OR DSTREG, ImmediateValue</ | + | | 1 |<code asm>OR DSTREG, ImmediateValue</ |
- | | 2 |<nowiki>OR DSTREG, SRCREG</nowiki> |<nowiki>DSTREG = DSTREG | SRCREG;</ | + | | 2 |<code asm>OR DSTREG, SRCREG</code> |<code c>DSTREG = DSTREG | SRCREG;</ |
===Description=== | ===Description=== | ||
- | OR performs a **Bitwise | + | OR performs a **Bitwise |
- | operands. The result is stored in the first of them, which is always a register. | + | |
====XOR==== | ====XOR==== | ||
Line 867: | Line 790: | ||
===Structure and variants=== | ===Structure and variants=== | ||
^ Variant | ^ Variant | ||
- | | 1 |<nowiki>XOR DSTREG, ImmediateValue</ | + | | 1 |<code asm>XOR DSTREG, ImmediateValue</ |
- | | 2 |<nowiki>XOR DSTREG, SRCREG</nowiki> |<nowiki>DSTREG = DSTREG ^ SRCREG;</ | + | | 2 |<code asm>XOR DSTREG, SRCREG</code> |<code c>DSTREG = DSTREG ^ SRCREG;</ |
===Description=== | ===Description=== | ||
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===Structure and variants=== | ===Structure and variants=== | ||
- | * < | + | ^ Variant |
- | * < | + | | 1 |< |
- | + | | 2 |< | |
- | ===Processing actions=== | + | |
- | * < | + | |
- | * < | + | |
===Description=== | ===Description=== | ||
SHL performs an bit shift to the left in the specified register. The second operand is | SHL performs an bit shift to the left in the specified register. The second operand is | ||
- | taken as an integer number of positions to shift. Shifting 0 positions has no effect, while | + | taken as an integer number of positions to shift. |
- | negative values result in shifting right. The shift type is logical: in shifts left, overflow is | + | |
- | discarded and zeroes are introduced as least significant bits. In shifts right, underflow is | + | Shifting 0 positions has no effect, while negative values result in shifting right. |
- | discarded and zeroes are introduced as most significant bits. | + | |
+ | The shift type is logical: in shifts left, overflow is discarded and zeroes are introduced as least significant bits. | ||
+ | |||
+ | In shifts right, underflow is discarded and zeroes are introduced as most significant bits. | ||