=====discrete Keyword 1=====
contradiction/falsehood
====Definition====
Contradiction/Falsehood:
Setting every bit to 0;
Outputting logically false to all possible logical inputs.

====References====




=====discrete Keyword 1 Phase 2=====
nonimplication/difference/but not

====Definition====
Nonimplicion/difference/but not means that the only true output is if p is true and q is false. Everything else is false. So if p is 0 and q is 1 the output should be 0.

====References====

  * http://en.wikipedia.org/wiki/Material_nonimplication


====Demonstration====
Demonstration of the indicated keyword.
<cli>
lab46:~$ P = 0 Q = 0 Output = 0
lab46:~$ P = 0 Q = 1 Output = 0
lab46:~$ P = 1 Q = 0 Output = 1
lab46:~$ P = 1 Q = 1 Output = 0
lab46:~$
</cli>