<WRAP centeralign round box>
<WRAP><color red><fs 200%>Corning Community College</fs></color></WRAP>
<WRAP><fs 150%>ENGR1050 C for Engineers</fs></WRAP>
</WRAP>

======PROJECT: Figure Something Out (FSO0)======

=====OBJECTIVE=====
Create circuitry and configure software to discover and demonstrate the functionality of some as-yet unutilized component from your electronics kit.

Be sure to contribute useful background and operational information to this project documentation, to serve as a reference for others.

=====OVERVIEW=====
Your task is to:

  * discover how to hook up and operate some component we've not otherwise utilized so far throughout our explorations in the course.
  * write a program that demonstrates its functionality.
  * there will be two more parts to this project, so if you want to take a broader-term view:
    * fso0: figure out how to use some component
    * fso1: prototype some circuit putting it to greater use
    * fso2: finished product

Example:

  * fso0: figure out how to use an ultrasonic sensor
  * fso1: prototype a "useless" machine, using the ultrasonic sensor as a proximity sensor to determine if the user's hand is still near the switch (to avoid injury)
  * fso2: finished product of a "useless" machine

=====GRABIT=====
To assist with consistency across all implementations, data files for use with this project are available on lab46 via the **grabit** tool. Be sure to obtain it and ensure your implementation properly works with the provided data.

<cli>
lab46:~/src/SEMESTER/DESIG$ grabit DESIG PROJECT
</cli>

=====EDIT=====
You will want to go [[/notes/c4eng/fall2022/projects/fso0|here]] to edit and fill in the various sections of the document:

  * [[/notes/c4eng/fall2022/projects/fso0|https://lab46.g7n.org/notes/c4eng/fall2022/projects/fso0]]

{{page>notes:c4eng:fall2022:projects:fso0&nouser&nodate&nomdate}}

=====SUBMISSION=====
To be successful in this project, the following criteria (or their equivalent) must be met:

  * Project must be submit on time, by the deadline.
    * Late submissions will lose 33%  credit per day, with the submission window closing on the 3rd day following the deadline.
  * All code must compile cleanly (no warnings or errors)
    * Compile with the **-Wall** and **--std=gnu18** compiler flags
    * all  requested functionality  must conform  to stated  requirements (either on  this document or  in a comment banner in  source code files themselves).
  * Executed programs must display in a manner similar to provided output
    * output  formatted,  where applicable,  must match  that of  project requirements
  * Processing must be correct based on input given and output requested
  * Output, if applicable, must be correct based on values input
  * Code must be nicely and consistently indented
  * Code must be consistently written, to strive for readability from having a consistent style throughout
  * Code must be commented
    * Any "to be implemented" comments **MUST** be removed
      * these   "to  be  implemented"   comments,  if  still  present  at evaluation time, will result in points being deducted.
      * Sufficient  comments  explaining  the point  of  provided   logic **MUST** be present
  * No global variables (without instructor approval), no goto statements, no calling of main()!
  * Track/version the source code in your lab46 semester repository
  * Submit  a copy of  your source code to  me using the  **submit** tool (**make submit** on lab46 will do this) by the deadline.

====Submit Tool Usage====
Let's  say you  have completed  work  on the  project, and  are ready  to submit, you  would do the following:

<cli>
lab46:~/src/SEMESTER/DESIG/PROJECT$ make submit
</cli>

You should get some sort of confirmation indicating successful submission if all went according to plan. If  not, check for typos and or locational mismatches.

=====RUBRIC=====
I'll be evaluating the project based on the following criteria:

<code>
65:fso0:final tally of results (65/65)
*:fso0:used grabit to obtain project by the Sunday prior to duedate [13/13]
*:fso0:picture of connected circuit to project page with description [13/13]
*:fso0:clean compile, no compiler messages [13/13]
*:fso0:program conforms to project specifications [13/13]
*:fso0:code tracked in lab46 semester repo [13/13]
</code>

===Pertaining to the collaborative authoring of project documentation===

  * each class member is to participate in the contribution of relevant information and formatting of the documentation
    * minimal member contributions consist of:
      * near the class average edits (a value of at least four productive edits)
      * near the average class content change average (a value of at least 256 bytes (absolute value of data content change))
      * near the class content contribution average (a value of at least 1kiB)
      * no adding in one commit then later removing in its entirety for the sake of satisfying edit requirements
    * adding and formatting data in an organized fashion, aiming to create an informative and readable document that anyone in the class can reference
    * content contributions will be factored into a documentation coefficient, a value multiplied against your actual project submission to influence the end result:
      * no contributions, co-efficient is 0.50
      * less than minimum contributions is 0.75
      * met minimum contribution threshold is 1.00

===Additionally===

  * Solutions not abiding  by spirit of project will be  subject to a 50% overall deduction
  * Solutions  not  utilizing descriptive  why and  how comments  will be subject to a 25% overall deduction
  * Solutions not utilizing indentation to promote scope and clarity or otherwise maintaining consistency in code style and presentation will be subject to a 25% overall deduction
  * Solutions not organized and easy to  read (assume a terminal at least 90 characters wide, 40 characters tall)  are subject to a 25% overall deduction